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  3. Digital Microelectronics Engineering Verification and Validation; DOT&E

Digital Microelectronics Engineering Verification and Validation; DOT&E

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  • Event Recording


    Digital Microelectronics Engineering Verification and Validation; DOT&E During the Design Phase to Absolutely Positively be on Cost on Schedule/Final Wrap; The "So What"


    Description: 

    This final webinar in the series introduces the fundamentals of the verification engines for pre-silicon verification and early software development. We will discuss formal verification, simulation at the transaction- and signal-level, emulation, and FPGA-based prototyping. Each of the engines provides different performance, fidelity, and debug flexibility that needs to be considered carefully in design bring-up and engine cost. Using practical customer examples, we will discuss options that development teams have to balance the engine usage and discuss the resulting optimization of verification throughput, "shift-left" software development at the earliest possible time during a project. Review of the four sessions the training and review the potential impact of commercial best practices on optimized development flows, delivering in-budget and on-time results. 


    Speakers: 


    Mr. Frank Schirrmeister, Senior Group Director, Cadence

    Frank Schirrmeister is a senior group director, solutions & ecosystem at Cadence, where he leads a team translating customer challenges in the hyperscale, communications, consumer, automotive,  aerospace/defense, industrial and healthcare vertical domains into specific requirements and solutions. 

    Frank holds a Dipl.-Ing. in electrical engineering from the Technical University of Berlin, Germany. Prior to joining Cadence, Frank held senior engineering and product management positions in embedded software, semiconductor and system development, both in Europe and the United States.



    Mr. James Chew Senior Global Group Director, Aerospace and Defense, Cadence Design Systems Chairman, National Defense Industry Association Science and Engineering Technology Division

    James Chew is the Senior Global Group Director, Aerospace and Defense, Cadence Design Systems, as well as the Chair, NDIA Science and Engineering Technology Division. Based in Washington, DC, Chew regularly interacts with senior level executives within the Executive and Legislative branches of the Federal government, as well as senior  executives within the global Defense and the Commercial Industrial Base.

    Event Survey: https://eval.dau.edu/jfe/form/SV_ePOtI66PnOCGn2K?EventID=590


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