This first in a four-webinar series provides a summary of the four sessions and will discuss the potential impact of commercial best practices on optimized development flows, delivering in-budget and on-time results, and provides introduction to how electronic systems, especially semiconductor-based systems, are designed and manufactured. It assumes no prior knowledge and will provide attendees with an understanding of Moore's Law, how chips are built in fabs, how chips are designed with tools like Cadence's, how boards and systems are created, how they are verified. This module generally sets up the presentations for the rest of the series.
Dr. Paul McClellan Microelectronics Guru
Paul McLellan has a 40-year background in semiconductor and EDA with both deep technical knowledge and extensive business experience. He worked as a consultant and journalist in EDA, embedded systems and semiconductor. Paul was educated in Britain and spent the early part of his career as a software engineer at VLSI Technology both in California and France, eventually becoming CEO of Compass Design Automation. Since then he was VP engineering at Ambit, corporate VP at Cadence, VPs of marketing at VaST Systems Technology and Virtutech, and CEO at Envis Corporation. He rejoined Cadence in 2015 and has written the Breakfast Bytes blog daily ever since.
Mr. James Chew Senior Global Group Director, Aerospace and Defense, Cadence Design Systems Chairman, National Defense Industry Association Science and Engineering Technology Division
James Chew is the Senior Global Group Director, Aerospace and Defense, Cadence Design Systems, as well as the Chair, NDIA Science and Engineering Technology Division. Based in Washington, DC, Chew regularly interacts with senior level executives within the Executive and Legislative branches of the Federal government, as well as senior executives within the global Defense and the Commercial Industrial Base.
Who Should Attend:
Innovators, Change Agents, DoD Thinkers and Doers