This final webinar in the series introduces the fundamentals of the verification engines for pre-silicon verification and early software development. We will discuss formal verification, simulation at the transaction- and signal-level, emulation, and FPGA-based prototyping. Each of the engines provides different performance, fidelity, and debug flexibility that needs to be considered carefully in design bring-up and engine cost. Using practical customer examples, we will discuss options that development teams have to balance the engine usage and discuss the resulting optimization of verification throughput, "shift-left" software development at the earliest possible time during a project. Review of the four sessions the training and review the potential impact of commercial best practices on optimized development flows, delivering in-budget and on-time results.
Frank Schirrmeister is a senior group director, solutions & ecosystem at Cadence, where he leads a team translating customer challenges in the hyperscale, communications, consumer, automotive, aerospace/defense, industrial and healthcare vertical domains into specific requirements and solutions.
Frank holds a Dipl.-Ing. in electrical engineering from the Technical University of Berlin, Germany. Prior to joining Cadence, Frank held senior engineering and product management positions in embedded software, semiconductor and system development, both in Europe and the United States.
Who Should Attend:
Innovators, Change Agents, DoD Thinkers and Doers
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